Re: [cobalt-users] RaQ1 vs. RaQ3

[Dom Latter <d.latter@xxxxxxx>]

Jeremy Anthony Kinsey wrote:
> 
> I have drawn my own conclusion, however, humble... And I stress humble.

Hey, I'm no processor architect either, but....

> But it is my contention that this is the difference in a RISC based
> processor vs. a SISC based processor.  Someone correct me if I am wrong,

CISC, not SISC.

> but I remember the RaQ1 having a RISC Based processor, similar, if not
> the same found to be based on the Motorola PPC chip.  The simple fact is,

It's a MIPS architecture, not PPC.

> or how Don Crabb(God rest his soul) once explained it to me in college,
> is that the RISC based processor has a very basic set of instructions,
> usually not more than 100.  Where as the SISC has 1000's.  There are
> essentially less things a RISC based processor has to do to function.
> This is the reason you find most PPC or RISC based chips being 2 to 3
> times faster than there counterparts at half the speed in Mhz.  This is
> also why the RISC does not get hot enough to melt lead.

Ummm... sort of.  The RISC vs. CISC debate is not really an issue 
any more.  I believe that at heart most CISC chips are basically
RISC chips, with a translation layer in between.  The Transmeta 
chips take this to an extreme.  (All AIUI, of course).

Meanwhile VLIW seems to be quite trendy.

> My guess is that the switch in processors is where the problem lies,
> rather than the architecture, or the software.  An old RaQ1 could easily

I don't see how you got there.  Exactly *how* 2 and 2 are added
together to make 4 (4.0000158 on early Pentiums) isn't going to
change how much swapping goes on.

> flood a full T1 without sweating a beat.  I do not believe that the
> change in processors was so much a performance improvement/advancement,
> as it was a marketing decision.  Beyond all this, I begin to wonder what

Well, there's a lot to be said for binary compatibility.

And a lot to be said against it.  How much more likely is a Raq3
to be hacked than a Raq2?

> will happen when users of the SISC base architecture begin to realize
> that they cannot get much past 1000Mhz, where as the RISC is possible of
> well over 10,000Mhz, without super coolers if I might add.

The *users* won't care as long as it runs Windows 2005.