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[cobalt-developers] Re: Cobalt MIPS CPU
- Subject: [cobalt-developers] Re: Cobalt MIPS CPU
- From: Andrew Tuckey <tuckey@xxxxxxxxxxxx>
- Date: Fri Jun 2 01:19:41 2000
> On Wed, May 31, 2000 at 12:41:51PM -0400, Kevin D wrote:
> : I am interested in finding out more about the cpu in the cobalt RAQ3i. I
> : want eventually to write some C++ code for it, and I was wondering if the
> : instruction set were compatible with the x86 instruction set (I believe i
> : read this somewhere?) My concern of course is being able to debug and
> : compile on my Intel x86 workstation and then installing the software on the
> : RAQ.
>
> There are some noticable difference in the MIPS vs Intel instructions set
> (hint: one is better, and Intel doesn't make it!). I recommend See Mips Run
> by Dominic Sweetman to learn more about the MIP arch.
>
> : Also, I am slightly interested in installing some programs on the RAQ that
> : are not opensource, and come in only x86 flavor.
>
> If you are using the came compiler, this should be fairly painless. I have
> recently been working on a non-opensource project and the port to MIPS
> was simply:
>
> make
>
> :)
>
> Of course that it not always the case.
I have some questions about the 64-bit 'ness of the MIPS processors used in
the Qube and RaQ(2).
As far as I'm aware the low-end Qube and the RaQ use the RM5320 MIPS processor
(175MHz clock) made by QED in Santa Clara, CA.
The high-end Qube (what I have) and the RaQ2 use the RM5321 MIPS processor
(250MHz clock), also made by QED. Both of these have 64-bit superscalar
processor cores and a 32-bit system address bus (presumably to keep the
packages small).
In the process of porting CyberPatrol to a Qube I was keen to check for word
length dependencies; I was using the CyberPatrol Linux/Intel port as a
reference. The output of configure is :
Intel:
checking host system type... i686-pc-linux-gnu
checking whether byte ordering is bigendian... (cached) no
checking size of unsigned int... (cached) 4
checking size of unsigned short... (cached) 2
checking size of unsigned long... (cached) 4
MIPS:
checking host system type... mipsel-unknown-linux-gnu
checking whether byte ordering is bigendian... (cached) no
checking size of unsigned int... (cached) 4
checking size of unsigned short... (cached) 2
checking size of unsigned long... (cached) 4
I don't see any 64-bit 'ness here.
Also /usr/include/limits.h is almost identical for both systems. limits.h for
the MIPS is :
/* These assume 8-bit `char's, 16-bit `short int's,
and 32-bit `int's and `long int's. */
/* Number of bits in a `char'. */
# define CHAR_BIT 8
/* Minimum and maximum values a `signed char' can hold. */
# define SCHAR_MIN (-128)
# define SCHAR_MAX 127
/* Maximum value an `unsigned char' can hold. (Minimum is 0.) */
# define UCHAR_MAX 255
/* Minimum and maximum values a `char' can hold. */
# ifdef __CHAR_UNSIGNED__
/* Minimum and maximum values a `signed short int' can hold. */
# define SHRT_MIN (-32768)
# define SHRT_MAX 32767
/* Maximum value an `unsigned short int' can hold. (Minimum is 0.) */
# define USHRT_MAX 65535
/* Minimum and maximum values a `signed int' can hold. */
# define INT_MIN (- INT_MAX - 1)
# define INT_MAX 2147483647
/* Maximum value an `unsigned int' can hold. (Minimum is 0.) */
# ifdef __STDC__
# define UINT_MAX 4294967295U
# else
# define UINT_MAX 4294967295
# endif
/* Minimum and maximum values a `signed long int' can hold. */
# ifdef __alpha__
# define LONG_MAX 9223372036854775807L
# else
# define LONG_MAX 2147483647L
# endif
# define LONG_MIN (- LONG_MAX - 1L)
/* Maximum value an `unsigned long int' can hold. (Minimum is 0.) */
# ifdef __alpha__
# define ULONG_MAX 18446744073709551615UL
# else
# ifdef __STDC__
# define ULONG_MAX 4294967295UL
# else
# define ULONG_MAX 4294967295L
# endif
# endif
64-bit variables are only defined for the __alpha__.
Is there anything in the MIPS processor that is 64-bits long? Is limits.h
incorrect?
--
Andrew Tuckey
The Netherlands. Email: tuckey@xxxxxxxxxxxx